2024
1. P Bhattacharjee, A. Majumder "Design of VFC with Programmable Frequency Ramp to control on-chip switching current profile", 37th IEEE International Conference on VLSI Design (VLSID 2024), 6-10 January 2024, Kolkata, India (Nominated for Best Paper Award), 2024
2. T. Pokhrel, A. Majumder "Exploring Dual threshold in a Double Gated TIG JLT for a logic Application", 8th IEEE Electron Devices Technology and Manufacturing Conference (EDTM 2024), 03-06 March 2024, Bangalore, India., 2024
2023
1. B Chowdhury, S Awasthi, MA Jalil, A Majumder, SK Metya "Ti:LiNbO3 Based EO-MZI Count Optimized Design of Reversible Peres Gate", IEEE 33rd International Conference RADIOELEKTRONIKA, 19-20 April 2023, University of Pardubice, Czech Republic, 2023
2. P Bhattacharjee, GN Goud, VK Singh, VP Yadav, AJ Mondal, A Majumder "Comparative Exploration of Gate Count and Leakage Optimized D-Latch in Nanometer CMOS", IEEE 33rd International Conference RADIOELEKTRONIKA, 19-20 April 2023, University of Pardubice, Czech Republic, 2023
3. T. Pokhrel, A. Majumder "Double Gate JLT Based New TIGFET for Dynamic C2MOS Application", 19th IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2023), 19-22 November 2023, Hyderabad, 2023
4. K Chakraborty, A. Majumder, AJ Mondal "Area and Power Efficient Differential Programmable Delay Cell", IEEE 20th India Council International Conference (INDICON-2023), 14-17 December 2023, Hyderabad, 2023
2022
1. S. Awasthi, S. Sharma, B. Chowdhury, G. Singh, S.K. Metya, A. Majumder "Configuring Logic Operations from New Reversible Toffoli Gate Using Pockel's Effect of Ti: LiNbO3", IEEE Region 10 Symposium (TENSYMP 2022), IIT Bombay, 01-03 July 2022., 2022
2. T.R. Pokhrel, A. Majumder "Study of Power-Delay Improved Logic Circuit Using Strained Silicon DG-JLT with Variable Gate Work Function", IEEE Region 10 Symposium (TENSYMP 2022), IIT Bombay, 01-03 July 2022, 2022
2021
1. S. Awasthi, B. Chowdhury, M.A. Ali, J. Ali, P. Yupapin, S.K. Metya, A. Majumder "Analysis for Cost Optimized EO Design of a Reversible Boolean Function using MZIs", 5th International Conference on Optical & Wireless Technologies (OWT 2021), Springer, 9-10 October 2021, Jaipur, India, 2021
2. S. Awasthi, S.K. Metya, A. Majumder "MZI based Electro-Optic Reversible XNOR/XOR Derived from Modified Fredkin Gate", 3rd International Conference on Machine Intelligence and Signal Processing (MISP-2021), Springer, 23-25 September 2021, Arunachal Pradesh, India, 2021
3. S. Awasthi, S.K. Metya, A. Majumder "Electro-optic 2:1 Reversible MUX Based on Ti diffused Lithium Niobate MZI", IEEE 35ᵗʰ Symposium on Microelectronics Technology (SBMicro-2021), 23-27 August 2021, Brazil., 2021
4. P. Das, A. Majumder "Analysis of a Transistor Count Optimized Charge Pump for Telecommunication Application", IEEE ZINC 2021, 26-27 May 2021, Novi Sad, Serbia, 2021
2020
1. M. Maiti, S. Chakrabartty, A. Al-Shidaifat, H. Song, BK Bhattacharyya, A. Majumder "A 90nm PVT Tolerant Current Mode Frequency Divider with Wide Locking Range", IEEE Nordic Circuits and Systems Conference (NorCAS 2020), Oslo, Norway, 2020
2. S Awasthi, S Sharma, SK Metya, A Majumder "Electro-Optic Reversible Toffoli Gate with Optimal Count of LiNbO3 Mach-Zehnder Interferometers", IEEE Nordic Circuits and Systems Conference (NorCAS 2020), Oslo, Norway, 2020
3. Mithilesh Kumar, Alak Majumder, Abir J mondal "Performances of a Low Power Latch due to PSN", IEEE Electrical Design of Advanced Packaging and Systems (EDAPS-2020), Shenzhen, China, 2020
2019
1. M Maiti, A Paul, SK Saw, A Majumder "A Dynamic Current Mode D-Flipflop for High Speed Application", IEEE 3rd International Conference on Electronics, Materials Engineering and Nano-Technology (IEMENTech 2019), 2019
2018
1. P. Bhattacharjee, A. Majumder "A Variable Delay Circuit to Develop Identical Rise/Fall Time in the Output", 2nd International Conference on Computational Advancement in Communication circuit and System (ICCACCS-2018),Kolkata, India. (Best Paper Award), 2018
2. D. Sarkar, P. Bhattacharjee, A. Majumder "Data Dependent Clock Gating Approach for Low Power Sequential System", 5th International Conference on Microelectronics, Circuits & Systems (MICRO - 2018), Bhubaneswar, India, 2018
3. P. Das, S.K. Saw, M. Maiti, A. Majumder "Low Power Fast Locking Charge Pump Architecture for PLL Application", 5th International Conference on Microelectronics, Circuits & Systems (MICRO - 2018)Bhubaneswar, India, 2018
4. S.K. Saw, M. Maiti, M. Jana, A.J. Mondal, A. Majumder "A Current Mode VCO Design Approach for Higher Oscillation Frequency", 5th International Conference on Microelectronics, Circuits & Systems (MICRO - 2018), 2018
5. S.K. Saw, M. Maiti, A. Majumder "PVT Aware Design of a Dead-Zone Free High Speed Phase Frequency Detector in 90nm CMOS", 5th International Conference on Microelectronics, Circuits & Systems (MICRO - 2018), Bhubaneswar, India, 2018
2017
1. S.K. Saw, P. Das, M. Maiti, A. Majumder "A 90nm Design of Charge Pump Circuit for Perfect Current Matching", 6th International Conference on Computing, Communication and Sensor (CCSN - 2017), Kolkata, India, 2017
2. M. Maiti, S.K. Saw, A. Majumder, "A 90nm Design of Low Power Voltage Controlled Oscillator with Wide Tuning Range", 6th International Conference on Computing, Communication and Sensor (CCSN - 2017), Kolkata, India, 2017
3. A. Majumder, P. Bhattacharjee "Current Profile Generated by Gating Logic Reduces Power Supply Noise of Integrated CPU Chip", 3rd IEEE International Symposium on Nano-electronic and Information Systems (iNIS - 2017), Bhopal, India, 2017
4. M. Das, A. Majumder, A.J. Mondal, B.K. Bhattacharyya "A 90nm Novel Mux-Dual Latch Design Approach for Gigascale Serializer Application", 3rd IEEE International Symposium on Nano-electronic and Information Systems (iNIS - 2017), 2017
5. B. Nath, A. Majumder "Binary Counter Based Gated Clock Tree for Integrated CPU Chip", 3rd IEEE International Symposium on Nano-electronic and Information Systems (iNIS - 2017), Bhopal, India, 2017
6. A. J. Mondal, A. Majumder, B.K. Bhattacharyya "A Design Methodology for MOS Current Mode Logic VCO", 3rd IEEE International Symposium on Nano-electronic and Information Systems (iNIS - 2017), Bhopal, India, 2017
7. S. Rambabu, A. Majumder, A.J. Mondal "A 90nm Gain Enhanced Modified Cascode OTA Structure with Positive Feedback Load", IEEE International Conference on Communication and Electronics Systems (ICCES 2017), Coimbatore, India., 2017
8. P. Bhattacharjee, B. Nath, A. Majumder "LECTOR Based Clock Gating for Low Power Multi-Stage Flip Flop Applications", IEEE & IEIE 16th International Conference on Electronics, Information, and Communication (ICEIC - 2017), Phuket, Thailand, (Best Paper Award), 2017
2016
1. P. Bhattacharjee, A. Majumder "LECTOR Based Gated Clock Approach to Design Low Power FSM for Serial Adder", 2nd IEEE International Symposium on Nano-electronic and Information Systems (iNIS - 2016), Gwalior, India, 2016
2. P. Bhattacharjee, A. Majumder, T.D. Das "A 90 nm Leakage Control Transistor Based Clock Gating for Low Power Flip Flop Applications", IEEE 59th International Midwest Symposium on Circuit and System (MWSCAS - 2016), Abu Dhabi, UAE, 2016
3. P. Bhattacharjee, A.J. Mondal, A. Majumder "A Constraint Driven Technique For MOS Amplifier Design", IEEE 20th International Symposium on VLSI Design and Test (VDAT-2016), IIT Guwahati, Assam, India., 2016
4. R.P. Acharya, A.J. Mondal, A. Majumder "A Method To Design A Comparator For Sampled Data Processing Applications", IEEE 20th International Symposium on VLSI Design and Test (VDAT-2016), IIT Guwahati, India, 2016
5. A. Majumder, M. Das, B. Nath, A.J. Mondal, B.K. Bhattacharyya "Design of Low Noise High Speed Novel Dynamic Analog Comparator in 65nm Technology", 26th Conf. on RADIOELEKTRONIKA 2016, Kosice, Slovakia, 2016
6. R. Kaushik, A. Majumder, A.J. Mondal "Design and Analysis of New Glitch Free Adiabatic Logic Circuits", IEEE 26th International Conference on RADIOELECTRONIKA 2016, Kosice, Slovakia, 2016
7. P. Bhattacharjee, A.J. Mondal, A. Majumder "Amplifier Design and Optimization Using Non Linear Programming", IEEE 26th International Conference on RADIOELECTRONIKA 2016, Kosice, Slovakia., 2016
8. A. Majumder, P. Deb, S.K. Yadav "Power and Energy Efficient Logic Design using Stacking Effect of Transistors", IEEE International Conference on Electrical, Electronics and Optimization Techniques (ICEEOT 2016), Chennai, India., 2016
9. P. Deb, A. Majumder "Leakage Reduction Methodology of 1-bit Full Adder in 180nm CMOS Technology", 3rd International Conference on Devices, Circuits and Systems, IEEE, Coimbatore, India, 2016., 2016
10. A. Majumder, R. Kaushik "Mathematical Modeling and Analysis of New Modified Glitch Free Adiabatic Inverter Circuit with Trapezoidal Power Supply", VLSI SATA 2016, Bangalore, India, Sponsored by IEEE., 2016
2015
1. A. Majumder, A.J. Mondal, V. Chaudhary, B.K. Bhattacharyya "A Methodology to Achieve Over 25Gbit/s data rate in Point to Point Interconnect", 11th International conf. on Microwave, Antenna, Propagation & Remote Sensing, IEEE-GRSS, Jodhpur, India, 2015
2. A. Majumder, B. Chowdhury, V. Chaudhary, P. Chakraborty, B.K. Bhattacharyya "A Methodology of High Speed Signaling through strip-line Interconnect using Resistive Channel to Minimize ISI Noise", 11th International conference on Microwave, Antenna, Propagation & Remote Sensing, IEEE-GRSS, Jodhpur, India., 2015
3. A. Majumder, D.T. Reddy, R. Shrivastawa "Generation of Chaos using a Simple Electronic Circuit", International Conference on Applied and Theoretical Computing and Communication Technology (ICATCCT 2015), Karnataka, India., 2015
4. A. Majumder, B. Chowdhury, V. Kumar "Cost Efficient Realization & Synthesis of Reversible Pre-settable Program Counter for Processor", International Conf. on Applied & Theoretical Computing and Communication Technology (ICATCCT - 2015), IEEE., 2015
5. J. Goswami, S. Ghosh, A. Majumder, S. Katiyar "Development of a Prototype to detect Speed Limit Violation for Better Traffic Management", 8th International Conf. on Contemporary Computing (IC3-2015), IEEE, Noida, India, 2015
6. A. Kar, M. Das, B. Nath, D. Sarkar, A. Majumder "Comparative Analysis of Low Power Novel Encoders for Flash ADC in 45nm Technology", IEEE International Conference on Smart Technologies and Management for Computing, Communication, Controls, Energy & Materials (ICSTM - 2015), Chennai, India., 2015
7. M. Das, B. Nath, D. Sarkar, A. Kar, A. Majumder "Design of Ultra Low Power Novel 3-Bit Flash ADC in 45nm CMOS Technology", IEEE International Conference on Smart Technologies and Management for Computing, Communication, Controls, Energy & Materials (ICSTM - 2015), Chennai, India., 2015
8. S. Ghosh, J. Goswami, A. Kumar, A. Majumder "Issues in NFC as a form of Contactless Communication: A Comprehensive Survey", IEEE International Conference on Smart Technologies and Management for Computing, Communication, Controls, Energy & Materials (ICSTM - 2015), Chennai, India., 2015
9. D. Muchahary, A.J. Mondal, R.S. Parmer, A.D. Borah, A. Majumder "A Simplified Design Approach for Efficient Computation on DCT", 5th IEEE International Conf. on Communication System and Network Technologies (CSNT-2015), Gwalior, India, 2015
10. A.J. Mondal, A.D. Borah, D. Muchahary, A. Majumder "FIR Low Pass filter design using Craziness Base Particle Swarm Optimization Technique", International Conf. on Communication and Signal Processing (ICCSP-2015), IEEE, Tamilnadu, India, 2015
11. D. Muchahary, A.J. Mondal, A. Majumder "A CORDIC Based Design Technique for Efficient Computation of DCT", International Conference on Communication and Signal Processing (ICCSP-2015), IEEE, Tamilnadu, India., 2015
12. A.J. Mondal, S.K. Singh, A. Majumder "Generation and Performance Evaluation of Reconfigurable Random Routing Algorithm for 2D Mesh NOC", 16th IEEE Latin American Test Symposium (LATS 2015), Mexico, 2015
13. P.L. Singh, A. Majumder, B. Chowdhury, R. Singh, N. Mishra "A Novel Realization of Reversible LFSR for its Application in Cryptography", 2nd International Conference on Signal Processing and Integrated Networks, Noida, India, Sponsored by IEEE., 2015
14. A. Majumder, B. Chowdhury, A.J. Mondal, K. Jain "Investigation on Quine McCluscky Method: A Decimal Manipulation Based Novel Approach for the Minimization of Boolean Function", Proceedings of International Conference on EDCAV 2015, pp – 08 – 12, Shillong, India, Sponsored by IEEE., 2015
15. K. Jain, S.K. Singh, A. Majumder, A.J. Mondal "Problems Encountered in Various Arbitration Techniques used in NOC Router: A Survey", Proceedings of International Conference on EDCAV 2015, Shillong, India, Sponsored by IEEE., 2015
16. A. Majumder, P.L. Singh, N. Mishra, A.J. Mondal, B. Chowdhury "A Novel Delay & Quantum Cost Efficient Reversible Realization of (2i x j) Random Access Memory", IEEE VLSI SATA 2015, Bangalore, India., 2015
17. A. Kar, A. Majumder, A.J. Mondal, N. Mishra "Design of Ultra Low Power Flash ADC using TMCC & Bit Referenced Encoder in 180 nm Technology", IEEE VLSI SATA 2015, Bangalore, India., 2015
